1. Field of the Invention
The present invention relates generally to processing memory requests in a SoC, and in particular to methods and mechanisms for sharing an agent's private cache in a SoC.
2. Description of the Related Art
Integrated circuits (ICs) and Systems on Chips (SoCs) often include multiple circuits or agents that have a need to communicate with each other and/or access data stored in memory. These agents may include one or more of a central processing unit (CPU), graphics processing unit (GPU), input/output (I/O) processor, and/or other devices. Each agent may have a private cache in addition to the shared caches and shared memory in the SoC.
Techniques for reducing the power consumption of a SoC are increasingly desired. One of the techniques used to reduce power is by power-gating or shutting down unused or under-utilized circuitry. When an agent is powered down, its cache memory is often powered down accordingly. However, this may be a waste of resources while other agents are actively seeking more memory capacity or bandwidth.